Kirchhoff, Michael; Wagner, Lothar; Fengler, Wolfgang:
Compiler optimization on instruction scheduling for a specialized real-time floating point soft-core processor
In: Advances in Electrical and Computer Engineering : AECE, Vol. 19 (2019), No. 3, pp. 57 - 68
2019Journal article in JournalOA Gold
Technische Universität Ilmenau (1992-) » Department of Computer Science and Automation (1992-) » Institute for Computer and Systems Engineering (2005-) » Fachgebiet Rechnerarchitektur und Eingebettete Systeme (2010-)
Related: 1 publication(s)
Title in English:
Compiler optimization on instruction scheduling for a specialized real-time floating point soft-core processor
Author:
Kirchhoff, MichaelTU
GND
1196363374
ORCID
0000-0002-3736-3257ORCID iD
SCOPUS
57200147609
Other
connected with university
corresponding author
;Wagner, LotharTU
SCOPUS
57210991478
Other
connected with university
;Fengler, WolfgangTU
GND
13280123X
SCOPUS
6603642586
Other
connected with university
Year of publication:
2019
Open-Access-Way of publication:
OA Gold
DOI
10.4316/AECE.2019.03007
Scopus ID
85072200729
PPN:
1678126160
Language of text:
English
Appears in
Advances in Electrical and Computer Engineering : AECE
Place of publication:
Suceava
Publisher:
[Verlag nicht ermittelbar]
Year of publication:
2008
Open-Access-Way of publication:
OA Gold
in:
Vol. 19 (2019), No. 3, pp. 57 - 68
ISSN
1844-7600 Show availability online & print
ISSN
1582-7445 Show availability online & print
PPN:
625422015
ZDB ID
2551047-2
URL:
http://www.bibliothek.uni-regensburg.de/ezeit/?2551047
Language of text:
English
Media:
online resources
Type of resource:
Text
Part of statistic:
No
Keyword, Topic:
Dynamic compiler ; Optimization methods ; Processor scheduling ; Scheduling algorithms ; Vector processor
Media:
online resources
Type of resource:
Text
Peer Reviewed:
Yes
Part of statistic:
Yes
DESTATIS Subject Classification:
3530 Ingenieurinformatik/Technische Informatik

Abstract in English:

This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floatingpoint precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem.